Key Responsibilities:
Actively gather the necessary models and input to run the simulation from datasheets, supplier contacts, and websites.
Perform PCB level SI and PI (DC & AC Drop) analysis and provide layout optimization recommendations based on the results.
Perform S-parameter simulation and bench verification to verify and control matched impedances.
Perform high-frequency Signal Integrity testing, including compliance and debugging required for product development.
Needs to be detail-oriented, be able to document test plans, execute test procedures, and generate reports.
Job Requirements and Skills
Experience in the PCB design process: schematic capture, layout, generation of design files, BOMs, and release. Worked with schematic capture
tools like OrCAD & Allegro PCB.
Experience in the generation of Gerber files and PCB fabrication processes.
Expert in the PCB layout process conforming to IPC standards and electrical and mechanical constraints of printed circuit board design, fabrication, and assembly.
Componenet footprint/library creation.
Experience in reading component datasheets.
Experience in PCB stack-up analysis
Hands-on experience in PCB modeling and Package modeling.
Working knowledge of High-Speed design and RF principles (S-parameters, Impedance, etc.).
Strong Signal/Power Integrity fundamentals
Experience in simulating (FD/TD) memory interfaces for Board and Package is required (DDR3/DDR4, LPDDR3/4)
Experience in simulating (FD/TD) High-Speed Serial IO interfaces for Board and Package is required (PCIe Gen3/4, RGMII...etc)
Simultaneous switching output analysis
Simulations of device I/O to reduce overshoot and undershoot (which can cause increased noise on power planes due to return currents).
Crosstalk analysis of signals to reduce noise
Good knowledge of Power Delivery Network, impedance profile analysis, IR Drop Analysis, modeling of PCB and Package Shapes, and time- domain Analysis.