RTL(Verilog) and SV/UVM Concept and Practical knowledge / Regression using Venus & Granite setup/ Coverage/ UPF/Latency/Performance
Protocol Knowledge DDR5/EMMC/USB/GBE/AXI4/APB/AHB/DFT
Knowledge on Venus & Granite setup and Coverage/ UPF/Latency/Performance
Emulation expertise in zebu platform and Simics
Experience in C/C++ and scripting tcl/perl
Background in FPGA/SOC design and Verification
- Experience3 - 8 Years
- No. of Openings5
- EducationAny Bachelor Degree
- RoleFPGA Design Engineer
- Industry TypeIT-Hardware & Networking / IT-Software / Software Services
- Gender[ Male / Female ]
- Job CountryIndia
- Job TypeWork from Office