Design & Verification Engineer

Thundersoft

� A broad career platform- Cross regional and multi business development opportunities, equal achievement for everyone.

� A free working atmosphere- Flexible working hours and equal communication mechanism.

� Superior work benefits- Rich rewards and competitive remuneration

If this is a journey you��d like to embark on, keep reading!

In this position you will:

The successful candidate will apply current functional verification techniques to perform and improve pre-silicon verification quality and product Time to Market for ASIC/SOC design. He/She should be able to work independently on various DV tasks and providing technical guidance to the DV team. The candidate would involve technically in the porting/creation of the DV environment for the new design, block and chip level test plan creation and implementation, coverage analysis, and regression cleanup.

Requirements:

-Bachelor Degree or . in Electrical Engineering or Microelectronics.

-5y & above exp with pre-silicon UVM experience

The candidate should have good understanding on ASIC/SOC design flow and should have:

1. Strong coding with Verilog and SystemVerilog

2. Good knowledge of design verification methodology UVM.

3. Many experiences with sequence creation, functional cover groups and assertion coding.

4. Strong C/C++ software development experiences

5. Be familiar with scripting language, such as Perl, C shell, Makefile, Ruby.

• Experience

  4 - 8 Years

• No. of Openings

  1

• Education

  Professional Degree

• Role

  Design & Verification Engineer

• Industry Type

  Manufacturing / Production / Quality

• Gender

  [ Male / Female ]

• Type of Job

  Full Time

• Work Location Type

  Work from Office